FPGA Engineer - 3 month contract, CH

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Firma Kandou Bus SA
Kategorie Ingenieurswesen
Lohn (geschätzt) CHF 88'000 – 112'000 / Jahr
Einsatzort Saint-Sulpice

Job-Inhalt

We at Kandou are a team of passionate professionals striving to make a mark in the trajectory of the semiconductor industry. Our list of customers reads like a who’s is who of the technology world. If you love to be part of an adventure of a start-up challenging established tech giants and you are a proactive problem-solver who is motivated by pushing your limits and challenging the status quo, we have an opportunity for you.

Kandou is actively seeking a resourceful FPGA Engineer contractor.

Responsibilities

  • Support FPGA prototyping for high speed digital designs for PHY/SerDes IP
  • Validation and bring-up of devices and FPGAs in the lab
  • Work closely and support Kandou’s Firmware, Digital, Verification and Lab teams

Skills

  • FPGAs design/prototyping of blocks for multi-Gigabit serial and parallel data-link transceivers
  • Strong RTL coding skills (SystemVerilog preferred)
  • Scripting (Python preferred) and tool setup skills.
  • Good communicator and team player with strong analytical skills
  • Understanding of verification methodologies, in particular UVM, is an advantage.

Experience

  • 10+ years’ experience in prototyping digital designs in FPGAs
  • Technical background in FPGA design, validation and verification
  • Experience in industry standard FPGA tools for design, simulation and verification
  • Experience in digital high-speed blocks. High Speed interface competence and/or PCS experience would be a plus
  • Experience using Python or other scripting language for design validation

Bewerben

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